DFT Engineer

About the role

NXP is looking for a DFT Engineer in Tianjin to implement and verify design-for-test solutions for complex SoC designs. The role works across the product development cycle, from design through silicon bring-up and production.

Key responsibilities

• Implement and verify Scan, MBIST and Boundary Scan solutions for complex SoC designs.
• Perform scan insertion, DFT DRC checking and scan chain validation to ensure testability and design quality.
• Analyze fault coverage and develop ATPG patterns for production silicon testing.
• Develop and maintain DFT automation flows and scripts using Tcl, Perl, Python or Shell.
• Collaborate with SoC Design, Verification, Physical Design and Test Engineering teams on DFT and test issues.
• Support silicon bring-up, diagnosis and yield improvement during product ramp-up and production.

Required profile

• Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, Computer Science or a related field.
• 1-3 years of experience in VLSI design, DFT or a related semiconductor engineering field.
• Strong communication and interpersonal skills, able to work in a global team.
• Good command of English; CET-6 or equivalent preferred.

Required skills

• Design-for-Test methodologies, including Scan, MBIST and Boundary Scan.
• Verilog, VHDL and scripting languages such as Tcl, Perl, Python or Shell.
• Hands-on SoC DFT experience for large chips is a plus; familiarity with ASIC/SoC flows is preferred.