DFT Verification Intern

About the role

NXP is looking for a DFT Verification intern in Tianjin. The intern contributes to SoC DFT design activities and supports the development of the DFT AI flow under the guidance of senior engineers.

Key responsibilities

• Run DFT pattern simulations, static and dynamic checks and prepare documentation.
• Assist with DFT AI Flow development under the guidance of senior engineers.
• Contribute to engineering quality, learning and teamwork throughout the development cycle.

Required profile

• Currently pursuing a Master's degree in Electrical Engineering, Electronics, Computer Engineering, Computer Science or a related discipline.
• Hands-on experience with ASIC EDA tools, SoC design projects, internships, coursework or student competitions is a plus.
• Strong foundation in engineering fundamentals, problem solving, testing and technical documentation.
• Able to collaborate with cross-functional teams and communicate technical ideas clearly.
• Good written and spoken English.

Required skills

• Familiarity with SoC digital design, verification, programming and EDA tools; willingness to learn quickly is important.
• Experience with ASIC EDA tools is a plus.